PA81J ? pa82j pa81-82u 1 PA81J, pa82j features ? high voltage operation 150v (pa82j) ? high output current 30ma (PA81J) ? low bias current, low noise fet input applications ? high impedance buffers up to 140v ? electrostatic transducer & deflection ? programmable power supplies to 145v ? biochemistry stimulators ? computer to vacuum tube interface description the pa80 series of high voltage operation amplifers provides an extremely wide range of supply capability with two over - lapping products. high accuracy is achieved with a cascode input circuit confguration. all internal biasing is referenced to a zener diode. as a result, these models offer outstanding common mode and power supply rejection. the output stage operates in the class a/b mode for best linearity. internal phase compensation assures stability at all gain settings without ex - ternal components. fixed internal current limits protect these amplifers against a short circuit to common at most supply voltages. for sustained high energy fyback, external fast recovery diodes should be used. however, a heatsink may be necessary to maintain the proper case temperature under normal operating conditions. this hybrid circuit utilizes thick flm resistors, ceramic capacitors and silicon semiconductors to maximize reliabil - ity, minimize size and give top performance. ultrasonically bonded aluminum wires provide reliable interconnections at all operating temperatures. the 8-pin to-3 package (see package outlines) is hermetically sealed and isolated from the internal circuits. the use of compressible thermal washers voids the warranty. external connections top view 1 2 3 4 5 6 7 8 Cv s +in Cin bal n.c. output bal +v s note: input offset trimpot optional. recommended value of 100k typical application the pa81 and 70k ohm resistor form a current to voltage converter, accepting 1ma from a 12 bit current output digital to analog converter. the power op amp contribution to the er - ror budget is insignifcant. at a case temperature of 70c, the combination of voltage offset and bias errors amounts to less than 31ppm of full scale range. incorporation of the optional offset trim can further reduce these errors to under 9ppm. equivalent schematic +75v C75v 70k PA81J high voltage programmable power supply 1ma d/a .47 .47 70v 2 7 4 3 5 6 1 q1 q2 d1 d2 q15 q12b q9 c4 q8 q13 q4 q3 c1 q16 q17 q5 c5 q12a q14 c6 c2 c3 q11 q6 q7 8-pin to-3 package style ce high voltage power operational amplifiers PA81J ? pa82j p r o d u c t i n n o v a t i o n f r o m copyright ? cirrus logic, inc. 2009 (all rights reserved) http://www.cirrus.com may 2009 apex ? pa81-82jurevj p r o d u c t i n n o v a t i o n f r o m
PA81J ? pa82j 2 pa81-82u specifications absolute maximum ratings PA81J pa82j supply voltage, +v s to Cv s 200v 300v output current, within soa internally limited power dissipation, internal 11.5w 11.5w input voltage, differential 150v 300v input voltage, common mode v s v s temperature, pin solder - 10 sec 300c 300c temperature, junction 150c 150c temperature range, storage C65 to +125c C65 to +125c operating temperature range, case C55 to +125c C55 to +125c PA81J pa82j parameter test conditions 2 min typ max min typ max units input offset voltage, initial t c = 25c 1.5 3 * * mv offset voltage, vs. temperature full temperature range 10 25 * * v/c offset voltage, vs. supply t c = 25c 20 * v/v offset voltage, vs. time t c = 25c 75 * v/kh bias current, initial t c = 25c 5 50 * * pa bias current, vs. supply t c = 25c .2 * pa/v offset current, initial t c = 25c 2.5 50 * * pa input impedance, dc t c = 25c 10 11 * input capacitance t c = 25c 10 * pf common mode voltage range 2 full temperature range v s C10 * v common mode rejection, dc v cm = 20v 110 * db gain open loop gain at 10hz full load 94 116 100 118 db unity gain bandwidth t c = 25c 5 * mhz power bandwidth t c = 25c, full load 60 30 khz phase margin full temperature range 45 * output voltage swing 2 t c = 25c, i pk v s C5 * v current, peak t c = 25c 30 15 ma current, limit t c = 25c 50 25 ma settling time to .1% t c = 25c, 10v step 12 * s slew rate 4 t c = 25c 20 * v/s capacitive load a v = 1 10 * nf power supply voltage full temperature range 32 75 75 70 150 150 v current, quiescent t c = 25c 6.5 8.5 6.5 8.5 ma thermal resistance, ac, junction to case 3 f > 60hz 6 * c/w resistance, dc, junction to case 3 f < 60hz 9 10 * * c/w resistance, junction to air full temperature range 30 * c/w temperature range, shutdown 150 * c temperature range, case meets full range specifcation 0 70 * * c notes: * the specifcation of pa82j is identical to the specifcation for PA81J in applicable column to the left. 1. the power supply voltage for all specifcations is the typ rating unless noted as a test condition. 2. +v s and Cv s denote the positive and negative supply rail respectively. total v s is measured from +v s to Cv s . 3. rating applies if the output current alternates between both output transistors at a rate faster than 60hz. 4. on the PA81J and pa82j, signal slew rates at pins 5 and 6 must be limited to less than 1v/ns to avoid damage. when faster waveforms are unavoidable, resistors in series with those pins, limiting current to 150ma will protect the amplifer from damage. the internal substrate contains beryllia (beo). do not break the seal. if accidentally broken, do not crush, machine, or subject to temperatures in excess of 850c to avoid generating toxic fumes. caution p r o d u c t i n n o v a t i o n f r o m
PA81J ? pa82j pa81-82u 3 0 25 50 75 100 125 temperature, t c (c) 2 6 8 12 power derating internal power dissipation, p (w) C50 100 80 120 130 current limit 100 70 frequency, f (hz) input noise voltage, v n (nv/hz) 1 frequency, f (hz) C20 0 60 small signal response open loop gain, a (db) 20 40 80 100 10 C210 C150 C60 0 phase response C90 C30 frequency, f (hz) output voltage, v o (v pp ) harm0nic distortion distortion (%) 90 power supply (% of max) 0.7 slew rate normalized slew rate 0.8 1.0 common mode voltage common mode voltage, v cm (v pp ) 1 frequency, f (hz) common mode rejection commom mode rejection, cmr (db) 40 80 120 10 100 1 frequency, f (hz) power supply rejection power supply rejection, psr (db) C15 45 85 64 bias current normalized current limit, (%) 4 input noise C25 25 50 75 110 power response 40 50 60 70 80 5 25 65 .06 .25 1k 100k 10 phase, () normalized bias current, i b (x) 1 20 60 100 10 100 0 20 40 60 80 100 0.9 90 256 C180 C120 0 60 125 100 1k 10k .1m 100 110 4 0 10k 1m 10m 1 105 120 100 10 1m 10m frequency, f (hz) 140 0 1k 10k 1m 1k 10k 1m 120 140 100 .1m 50k .5m 15 30 60 200 300 25k .15m .25m .35m 3 .1 .01 .003 .03 1 .3 1k 10k 100k 3k 100 300 30k .1m .1m 30 60 100 200 300 15 1m 10k .1m 20k 50k .2m .5m 2 4 6 10 20 10 1k 10k .1m 100 t = t a t = t c Cv s +v s PA81J/pa82j pa82j r l = 10k 100vrms PA81J r l = 2k 40vrms +25c to +85c C25c pa82j PA81J case temperature, t c (c) case temperature, t c (c) frequency, f (hz) pa82j PA81J 16 frequency, f (hz) p r o d u c t i n n o v a t i o n f r o m
PA81J ? pa82j 4 pa81-82u single supply operation these amplifers are suitable for operation from a single sup - ply voltage. the operating requirements do however, impose the limitation that the input voltages do not approach closer than 10 volts to either supply rail. this is due to the operating voltage requirements of the current sources, the half-dynamic loads and the cascode stage. refer to the simplifed schemat - ics.thus, single supply operation requires the input signals to be biased at least 10 volts from either supply rail. figure 3 illustrates one bias technique to achieve this. figure 4 illustrates a very common deviation from true single supply operation. the availibility of two supplies still allows ground (common) referenced signals, but also maximizes the high voltage capability of the unipolar output. this technique can utilize an existing low voltage system power supply and does not place large current demands on that supply. the 12 volt supply in this case must supply only the quiescent current of the PA81J, which is 8.5ma maximum. if the load is reactive or emf producing, the low voltage supply must also be able to absorb the reverse currents generated by the load. general please read application note 1 "general operating consider - ations" which covers stability, supplies, heat sinking, mounting, current limit, soa interpretation, and specifcation interpretation. visit www.cirrus.com for design tools that help automate tasks such as calculations for stability, internal power dissipation, current limit and heat sink selection. the "application notes" and "technical seminar" sections contain a wealth of informa - tion on specifc types of applications. package outlines, heat sinks, mounting hardware and other accessories are located in the "packages and accessories" section. evaluation kits are available for most apex precision power product models, consult the "evaluation kit" section for details. for the most current version of all apex precision power product data sheets, visit www.cirrus.com. safe operating area (soa) for the pa80j and PA81J, the combination of voltage capa - bility and internal current limits mandate that the devices are safe for all combinations of supply voltage and load. on the pa82j, any load combination is safe up to a total supply of 250 volts. when total supply voltage equals 300 volts, the device will be safe if the output current is limited to 10 milliamps or less. this means that the pa82j used on supplies up to 125 volts will sustain a short to common or either supply without danger. when using supplies above 125 volts, a short to one of the supplies will be potentially destructive. when us - ing single supply above 250 volts, a short to common will be potentially destructive. safe supply voltages do not imply disregard for heatsinking. the thermal calculations and the use of a heatsink are required in many applications to maintain the case temperature within the specifed operating range of 0 to 70c. exceeding this case temperature range can result in an inoperative circuit due to excessive input errors or activation of the thermal shutdown. inductive loads two external diodes as shown in figure 2, are required to protect these amplifers against fyback (kickback) pulses exceeding the supply voltage of the amplifer when driving in - ductive loads. for component selection, these external diodes must be very quick, such as ultra fast recovery diodes with no more than 200 nanoseconds of reverse recovery time. be sure the diode voltage rating is greater than the total of both supplies. the diode will turn on to divert the fyback energy into the supply rails thus protecting the output transistors from destruction due to reverse bias. a note of caution about the supply. the energy of the fyback pulse must be absorbed by the power supply. as a result, a transient will be superimposed on the supply voltage, the magnitude of the transient being a function of its transient impedance and current sinking capability. if the supply voltage plus transient exceeds the maximum supply rating, or if the ac impedance of the supply is unknown, it is best to clamp the output and the supply with a zener diode to absorb the transient. +v s Cv s figure 2. protection, inductive load +210v 50k pa82j figure 3. true single supply operation d/a +50/+200v +210v 50k 2.5k 2.5k 2.5/10v 50k +210v 50k +12v C130v 50k PA81J figure 4. non-symmetric supplies 0/5v d/a 0/C125v 2k p r o d u c t i n n o v a t i o n f r o m
PA81J ? pa82j pa81-82u 5 cont acting cirrus logic support for all apex precision power product questions and inquiries, call toll free 800-546-2739 in north america. for inquiries via email, please contact apex.support@cirrus.com. international customers can also request support by contacting their local cirrus logic sales representative. to fnd the one nearest to you, go to www.cirrus.com important notice cirrus logic, inc. and its subsidiaries ("cirrus") believe that the information contained in this document is accurate and reliable. however, the information is subject to change without notice and is provided "as is" without warranty of any kind (express or implied). customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. all products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnifcation, and limitation of liability. no responsibility is assumed by cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. this document is the property of cirrus and by furnishing this information, cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. cirrus owns the copyrights associated with the information contained herein and gives con - sent for copies to be made of the information only for use within your organization with respect to cirrus integrated circuits or other products of cirrus. this consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. certain applications using semiconductor products may involve potential risks of death, personal injury, or severe prop - erty or environmental damage (critical applications). cirrus products are not designed, authorized or warranted to be suitable for use in products surgically implanted into the body, automotive safety or security devices, life support prod - ucts or other critical applications. inclusion of cirrus products in such applications is understood to be fully at the cus - tomers risk and cirrus disclaims and makes no warranty, express, statutory or implied, including the implied warranties of merchantability and fitness for particular purpose, with regard to any cirrus product that is used in such a manner. if the customer or customers customer uses or permits the use of cirrus products in critical applications, customer agrees, by such use, to fully indemnify cirrus, its officers, directors, employees, distributors and other agents from any and all liability, including attorneys fees and costs, that may result from or arise in connection with these uses. cirrus logic, cirrus, and the cirrus logic logo designs, apex precision power, apex and the apex precision power logo designs are trademarks of cirrus logic, inc. all other brand and product names in this document may be trademarks or service marks of their respective owners. p r o d u c t i n n o v a t i o n f r o m
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